Ethernet ands I2C in MachXO5

MachXO5 Example Design

A very long time ago, we (A.L.S.E.) have invented the concept of a processor-less Ethernet stack !
We named the IP “GEDEK” for Gigabit Ethernet Data Exchange Kit and it has since helped a lot of customers to implement high speed data transfers in their FPGA designs using minimal resources.

This Reference Design shows an application where a small FPGA (the MachXO5-25) can host 14 independent I2C controllers running in parallel, while ensuring bi-directional data transfer with a PC through Ethernet, within fraction of the FPGA.

If you own this Development Board, you can quickly test our Reference design.

I2C & Ethernet Reference Design Principle

A Lattice MachXO5T-NX development board is used with up to 4 x Pmod I2C Temperature sensors attached. Each PMOD connector can host two sensor modules.
The design configures the sensors in their most accurate (and slowest) mode (12 bits with a resolution of 1/16th Celsius). The sensors are read 4 times per second.

The LEDs can display the LSBits of Sensor 0 temperature, or a value written by the PC.
The LEDs are dimmed by a PWM which can be adjusted by the PC.
We provide a Python utility program : i2c_eth.py to exercise the FPGA.
We also provide a command line utility gedek_rw.exe to read and write in the FPGA register map.

Block Diagram of the Reference Design

BlockDiagram

MachXO5 board

The commercial reference of this board is LFMXO5-100T-EVN. The documentation can be found here.
Beware ! don’t get confused : there exists a MachXO5™-NX Development Board, with a smaller FPGA and a version without Ethernet !

MachXO5T-NX evaluation board

Testing the Reference Design

All the details can be found in the document below.
You will see how to connect temperature sensors, program the board, connect it to Ethernet and interact with the board from your PC through Ethernet. You’ll see how to visualize the Ethernet frames exchanged using Wireshark.

If you own a LFMXO5-100T-EVN board, please contact us so we can send you the latest archive to test this Reference Design.

Document download

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